From 2e59f9740a29439df7c7a56cf0ae83dec3081d31 Mon Sep 17 00:00:00 2001
From: Micah Anderson <micah@riseup.net>
Date: Mon, 11 Aug 2014 13:49:21 -0400
Subject: initial import of debian version from mentors

---
 src/libsodium/sodium/runtime.c | 134 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 134 insertions(+)
 create mode 100644 src/libsodium/sodium/runtime.c

(limited to 'src/libsodium/sodium/runtime.c')

diff --git a/src/libsodium/sodium/runtime.c b/src/libsodium/sodium/runtime.c
new file mode 100644
index 0000000..52b3707
--- /dev/null
+++ b/src/libsodium/sodium/runtime.c
@@ -0,0 +1,134 @@
+
+#ifdef HAVE_ANDROID_GETCPUFEATURES
+# include <cpu-features.h>
+#endif
+
+#include "runtime.h"
+
+typedef struct CPUFeatures_ {
+    int initialized;
+    int has_neon;
+    int has_sse2;
+    int has_sse3;
+} CPUFeatures;
+
+static CPUFeatures _cpu_features;
+
+#define CPUID_SSE2     0x04000000
+#define CPUIDECX_SSE3  0x00000001
+
+static int
+_sodium_runtime_arm_cpu_features(CPUFeatures * const cpu_features)
+{
+#ifndef __arm__
+    cpu_features->has_neon = 0;
+    return -1;
+#else
+# ifdef __APPLE__
+#  ifdef __ARM_NEON__
+    cpu_features->has_neon = 1;
+#  else
+    cpu_features->has_neon = 0;
+#  endif
+# elif defined(HAVE_ANDROID_GETCPUFEATURES) && defined(ANDROID_CPU_ARM_FEATURE_NEON)
+    cpu_features->has_neon =
+        (android_getCpuFeatures() & ANDROID_CPU_ARM_FEATURE_NEON) != 0x0;
+# else
+    cpu_features->has_neon = 0;
+# endif
+    return 0;
+#endif
+}
+
+static void
+_cpuid(unsigned int cpu_info[4U], const unsigned int cpu_info_type)
+{
+#ifdef _MSC_VER
+    __cpuidex((int *) cpu_info, cpu_info_type, 0);
+#elif defined(HAVE_CPUID)
+    cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
+# ifdef __i386__
+    __asm__ __volatile__ ("pushfl; pushfl; "
+                          "popl %0; "
+                          "movl %0, %1; xorl %2, %0; "
+                          "pushl %0; "
+                          "popfl; pushfl; popl %0; popfl" :
+                          "=&r" (cpu_info[0]), "=&r" (cpu_info[1]) :
+                          "i" (0x200000));
+    if (((cpu_info[0] ^ cpu_info[1]) & 0x200000) == 0x0) {
+        return;
+    }
+# endif
+# ifdef __i386__
+    __asm__ __volatile__ ("xchgl %%ebx, %k1; cpuid; xchgl %%ebx, %k1" :
+                          "=a" (cpu_info[0]), "=&r" (cpu_info[1]),
+                          "=c" (cpu_info[2]), "=d" (cpu_info[3]) :
+                          "0" (cpu_info_type), "2" (0U));
+# elif defined(__x86_64__)
+    __asm__ __volatile__ ("xchgq %%rbx, %q1; cpuid; xchgq %%rbx, %q1" :
+                          "=a" (cpu_info[0]), "=&r" (cpu_info[1]),
+                          "=c" (cpu_info[2]), "=d" (cpu_info[3]) :
+                          "0" (cpu_info_type), "2" (0U));
+# else
+    __asm__ __volatile__ ("cpuid" :
+                          "=a" (cpu_info[0]), "=b" (cpu_info[1]),
+                          "=c" (cpu_info[2]), "=d" (cpu_info[3]) :
+                          "0" (cpu_info_type), "2" (0U));
+# endif
+#else
+    cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
+#endif
+}
+
+static int
+_sodium_runtime_intel_cpu_features(CPUFeatures * const cpu_features)
+{
+    unsigned int cpu_info[4];
+    unsigned int id;
+
+    _cpuid(cpu_info, 0x0);
+    if ((id = cpu_info[0]) == 0U) {
+        return -1;
+    }
+    _cpuid(cpu_info, 0x00000001);
+#ifndef HAVE_EMMINTRIN_H
+    cpu_features->has_sse2 = 0;
+#else
+    cpu_features->has_sse2 = ((cpu_info[3] & CPUID_SSE2) != 0x0);
+#endif
+
+#ifndef HAVE_PMMINTRIN_H
+    cpu_features->has_sse3 = 0;
+#else
+    cpu_features->has_sse3 = ((cpu_info[2] & CPUIDECX_SSE3) != 0x0);
+#endif
+
+    return 0;
+}
+
+int
+sodium_runtime_get_cpu_features(void)
+{
+    int ret = -1;
+
+    ret &= _sodium_runtime_arm_cpu_features(&_cpu_features);
+    ret &= _sodium_runtime_intel_cpu_features(&_cpu_features);
+    _cpu_features.initialized = 1;
+
+    return ret;
+}
+
+int
+sodium_runtime_has_neon(void) {
+    return _cpu_features.has_neon;
+}
+
+int
+sodium_runtime_has_sse2(void) {
+    return _cpu_features.has_sse2;
+}
+
+int
+sodium_runtime_has_sse3(void) {
+    return _cpu_features.has_sse3;
+}
-- 
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